According to some experience of the author's design, the detailed design of the entire system schematic is divided into several major modules. This article refers to the address: http:// Power supply part design: realized by LDO and DC-DC switching power supply control chip. How can I design the power of the entire system more efficiently and accurately? According to my own experience, mastering a few ideas, you can design a power supply that meets the needs of the system. 1. Which power supply does the system use: DC-12VIN, ATX, or battery? DC-12V IN: The power supply of the motherboard design is more. In addition to the chip power supply, the I/O power supply must be converted separately, such as +3.3VSB, +5V, +3.3V, etc. ATX: Since it provides 12V, +5VSB, +5V, +3.3V, you only need to design the voltage required by the chip. Battery input: It can be regarded as a DC power supply whose input voltage varies within a certain range. Higher requirements are placed on the input range of the chip, especially the power conversion chip, and higher requirements are placed on the efficiency of the power conversion chip. 2. According to the datesheet provided by the chip manufacturer, master the voltages required for each chip, the ripple voltage requirements, and understand the current required for each voltage. With these two pieces of information, we can determine if we want to choose LDO or DC-DC. LDO features: Advantages: the circuit is simple, its own small size, few peripheral devices, simple layout, and the resulting voltage ripple is relatively small. Disadvantages: poor transient response, low current supply and low conversion efficiency. Such as the system's normally open voltage. Scope of application: Non-critical circuits that require low current and are not required for current transient response. DC-DC features: Advantages: good transient response, high current supply, high conversion efficiency Disadvantages: The circuit is complicated, there are many peripheral devices, and it is easy to generate ringing. It is necessary to configure a low ESR polymer capacitor to suppress the ripple. Scope of application: A circuit that has a large difference between the input voltage and the output voltage, requires a large current, and the current may suddenly change. Such as VCORE, VDIMM and so on. 3. Master the state of operation of each voltage, that is, what kind of work the chip needs to perform at the moment of the system. This determines when we are going to power the chip. Example 1. Require the system to implement network wake-up, then the NIC chip must be powered by 3.3VSB normally open voltage. Assuming that the network card chip is powered by the working voltage, after the system is turned off, the working voltage is also completely broken, and the network card cannot work at this time. Understanding the supply voltage: The supply voltage is the source of energy for the chip. If the chip has voltage, the chip itself has the ability to work independently. If two chips are to communicate, the communication module of the two chips must have voltage supply. . 4. What are the timing requirements between the voltages of each channel? We should design each power supply according to the timing requirements given by the reference design. Clock CLK design required for each chip: realized by passive crystal oscillator + clock chip + active crystal oscillator Divided into bus clock and chip working clock In general, chipsets such as intel, amd, via, etc., which are introduced by several large CPU manufacturers, have dedicated clock chip manufacturers to follow up the design and the clock chip corresponding to this chipset. Therefore, the various bus clocks required by the main chip can be basically provided by the clock chip. Except for RTC 3.2768K, the working clock of the peripheral function chip can be provided by a passive crystal oscillator or an active crystal oscillator. System boot timing signal design: RESET signal: The function interface chip generally has a RESET signal, but a relatively complex IO chip like the South Bridge, because the chip integrates multiple functional modules, and the power state of different modules is also different, some are powered by a normally open power supply, and some are used. The operating power supply, so there may be several reset signals. According to my personal understanding, the reset signal design follows two principles: 1. The reset signal of a single chip, the reset signal must be reset after VCC is stabilized. How long does it take to reset, you need to refer to the chip's PDF 2. When multiple chips work together: After these chips VCC are stable, a reset signal is uniformly provided. Connection between chips: Implementation of various functions: 1. Understand what the chip can do, and what we want to use (determined during the chip selection phase) 2. Understand the required voltage and clock of the chip by reading the PDF of the chip 3. Special attention is required to the configuration of the chip 4. The principle of the communication bus for chip operation should be clear 5. Special attention should be paid to the hanging feet that are not used by the chip. Especially for those input pins, sometimes if the floating is easy, the input pin level of the chip is in a floating state, which causes the chip to misjudge. 6. For some circuits that are not understood in the pdf, you need to communicate with the manufacturer fae in detail. And after the final design, submit the schematic of this part to the FAE to help make the final CHECK. Summary of usual experience: Each product, because of the different consumption groups, has its own use characteristics and application environment, so it is necessary to carry out specific design according to the actual product for the details. Everything in the design process needs to be summarized and accumulated.
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X86 system, in general, the timing circuit designed by us mainly includes: RESET signal, timing control of each voltage, POWER_OK signal and so on. That is, the RESET signal, the matching between each voltage and POWER_OK needs to be designed according to the DATASHEET provided by the chip.
For the chipset of the X86 architecture and the peripheral functional interface chips, they are bridged by various buses. Therefore, this requires familiarity with the working principle of various buses: including the working voltage of the bus, the bus operating frequency, and what signals and control lines of the bus are composed. It is easier and more efficient to be familiar with the cascading between these chips.
The functional implementation of a chip is not singular and must be based on the system providing them with the correct voltage, clock, and proper bus connection to the host chip. The function implementation mentioned here mainly refers to how the function can be implemented according to the characteristics of the chip. To be able to implement the function of the chip better than the arrogant, I have summarized some experiences. 