In January 1979, "Electronic Test" published an article stating that a single test circuit "can perform all the standard DC tests required for a complete inspection of any operational amplifier" (Reference 1). A single test circuit can be used at that time, but not today because modern op amps have more comprehensive specifications. Therefore, a single test circuit does not take over all DC tests.

Three types of test circuit topologies are now commonly used for bench and production testing of operational amplifier DC parameters. The three topologies are (1) dual operational amplifier test loops, (2) self-test loops (sometimes referred to as fault summing point test loops), and (3) three op amp loops. You can use these circuits to test DC parameters including quiescent current (IQ), voltage offset (VOS), power supply rejection ratio (PSRR), common-mode rejection ratio (CMRR), and DC open-loop gain (AOL).

Quiescent Current

Quiescent current refers to the current consumed by the device when its output current is equal to zero. Although the IQ test looks fairly simple, it must also be taken care of to ensure good results, especially when dealing with extremely high or low IQ parts. Figure 1 shows three practical circuits that can be used to test IQ and other parameters. It must consider several load current conditions. This includes testing the feedback current in the loop. In fact, the feedback resistor Rf can also load the device, affecting the IQ measurement.

Figure 1. These three circuits can be used to measure quiescent current (IQ).

We illustrate these circuits by testing the OPA369 op amp as an example. The maximum quiescent current of this part is 1μA per channel. The maximum input offset voltage is 750μV. The dual op amp loop circuit in Figure 1 provides 750.75mV to the device under test. This input voltage allows Rf to pass 15μA. This current comes from the power supply and adds error to any measurement. Therefore, before making IQ measurements, steps must be taken to ensure that the output current is really equal to zero.

The self-test circuit is not the most efficient circuit for measuring very low quiescent currents because the output must provide feedback current. In this implementation, the output must be adjusted (not easy) based on the gain after voltage offset VOS, or the 50Ω resistor in the above schematic needs to be disconnected to eliminate the feedback current. Dual amplifier loops can achieve zero output requirements by adding another amplifier. Careful selection of a low input bias current loop amplifier results in very little error in the output current.

In addition, three operational amplifier loops can also help you measure IQ, but pay attention to the 1MΩ resistor at the output of the device being measured, which will become a problem, because it is always a parasitic load regardless of the measured parameters. If measuring the output load current, this resistor represents an additional load. In addition, the noise problem of this resistor must also be considered. The noise of a 1 MΩ resistor is 85 μVp-p at 0.1 Hz to 10 kHz. Using a 100kΩ resistor reduces the noise to 27μVp-p. Therefore, lowering the resistor value can reduce noise, but the parasitic resistor load at the output of the device being measured will then be more pronounced.

Voltage imbalance

The VOS test is the basis for measuring most other DC technical parameters of an operational amplifier. Therefore, pay special attention to the test circuit to ensure that the circuit works well when testing other parameters. If you do not choose this test configuration, it will affect other DC measurements.

VOS can be defined in many ways. Common methods include: “Differential DC input voltage required to provide zero output voltage when no input signal or no power supply resistance” (Reference 2), or “In any input to grounded path “Differential DC input voltage required to provide zero output voltage when no other input signal and resistance is zero” (Reference 3). Another way to define it is to provide the differential DC input voltage needed to provide zero voltage at the output of the op amp when the input bias current is zero. This is an ideal theoretical method for measuring the input offset voltage and is not practical because A zero input bias current op amp does not exist.

Based on the above definition, you can connect a low-output, high-precision, high-resolution variable-voltage power supply to the input of the op amp, and adjust the input voltage until the output voltage is zero. The input offset voltage is simply the inverse of the applied input voltage.

There are two serious problems with this approach. When testing op amps with extremely high open-loop gains, it must be ensured that the resolution of the voltage supply is less than 1 microvolt to ensure any degree of repeatability. In addition, iterative approach must also be used to make the output voltage zero. Noise in the system is coupled to voltage supplies and operational amplifiers, making measurement and control in high-speed automated test environments virtually impossible.

Figure 2. Use this circuit to measure voltage offset VOS.

Due to these problems of the ideal method, the common method chosen in the workbench test environment is to place the device under test in the inverting gain configuration, as shown in Figure 2. The advantage of this method is that not only is the device under test very stable, but it usually does not require additional compensation.

In addition, the test circuit may also need to provide a 50 Ω resistor between the non-inverting input and ground to offset the input bias current. However, for an op amp with a very low input bias current, the only true "contribution" to this resistor is increased noise. For a 100pA device, the additional error is only 0.005μV without the resistor. This cancellation works only when the direction and magnitude of the bias current are equal.

The circuit in Figure 2 is a simplified version of the self-test summing point method in Figure 1, but without the resistors R1 and R2. This circuit is inherently stable to most op amps and can often overwhelm any potential shortcomings, making it the preferred test circuit.

If you use the test circuit in Figure 2 for other tests, the disadvantages will appear. For example, the circuit in Figure 2 will have an effect on measuring other parameters such as IQ and AOL.

This undriven circuit can cause VOS errors with an error value equal to (VOS* closed-loop gain) * AOL (in V/V). This error may not be significant, but it can also be reduced by applying VOUT to 0.0V with the proper VIN.

Use the following formula 1 to adjust the output error compensation formula for the desired output.

VOUT = (2 * ASJ + ACL - ASJ) * VOUT (ideal) (formula 1)

Where ASJ is the summing point gain and ACL is the closed-loop gain.

An additional amplifier can usually be used in the test loop, as shown in the double-amplifier loop of Figure 1. This configuration is closest to the requirements defined by VOS. The output of the device under test remains within the loop amplifier to the grounded VOS. If the loop amplifier supports VOS regulation, or you can eliminate the offset by controlling the non-inverting input, you can ignore the offset of the loop amplifier. In this way, you can make the output of the device under test zero. The voltage measured at VOUT is 1001*VOS. Unless there is a load connected to the output of the device under test, the output must only provide loop amplifier input bias current. This is an important consideration for low IQ components when measuring quiescent current. In the previous two circuits, the device under test must provide feedback current to Rf.

By connecting the non-inverting input of the loop amplifier to a programmable voltage supply, other performance parameters of the op amp can be measured, such as AOL, output swing, and CMRR. Because the loop control voltage changes, the output of the device under test will try to match the control voltage.

Note that the dual amplifier loop has the following disadvantages:

More complicated than the self-test circuit;

Loop compensation is needed because the circuit itself is not stable;

The output of the device under test can only be controlled within the common-mode range of the loop amplifier.

If the loop is not properly compensated, the circuit will oscillate. You can stabilize the loop by connecting an appropriate capacitor in parallel with Rf. Placing a proper RC combination for the loop amplifier also stabilizes the loop. We will discuss this loop compensation problem in a future article.

A variation of the dual-amplifier loop test method is a three-amplifier loop, which can control the output voltage of the device under test through current steering. The loop compensation can be set by the RC combination of the second loop amplifier. As in the dual op amp circuit, the voltage offset of the device under test is also measured at VOUT, and VOUT is 1001 times the voltage offset. This circuit topology can solve the output swing limitation of the device under test in the former circuit. If a larger output swing is required, the resistor in series with the loop control voltage can be reduced.

Note that the three-amplifier loop has the following disadvantages:

More complicated than other circuits;

Loop compensation is required because the circuit itself is not stable;

The device under test always has a minimum load of 1 MΩ.

Power supply rejection ratio

PSRR is the ratio of the absolute value of the supply voltage change to the change in the input offset voltage of the op amp. In simple terms, it is the ability of the op amp to suppress power supply voltage changes in a specific range. Since the offset voltage is required to complete the measurement, you can use existing technology to measure VOS. The three test loops in Figure 1 can be used to complete the PSRR measurement. The method is to set the power supplies +VS and -VS to the lowest supply voltage of the device under test and measure 1001*VOS. Next, set the supply voltage to the maximum voltage of the device under test, and then measure 1001*VOS again. Equations 2 and 3 are the PSRR calculations.

Formula 2

Formula 3



When using this method, some op amps need to consider other factors. These op amps have a sufficiently low operating voltage that the midpoint of the supply (zero common-mode voltage) can exceed the maximum common-mode voltage allowed by the low-power configuration op amp. Some rail-to-rail input devices have multiple input stages that can operate smoothly under these conditions, but they can switch to different input stages, causing PSRR calculation errors. In both amplifiers, the common-mode voltage is fixed to prevent common mode saturation or input stage transitions. Maintaining a constant common-mode voltage for these two measurement methods of the PSRR test produces an error that can be offset during the PSRR calculation. The actual common-mode voltage required by these devices will vary depending on the topology of the amplifier input stage.

Common mode rejection ratio

CMRR is the ratio of the differential voltage gain to the common-mode voltage gain, which is the ability of the op amp to reject common-mode voltages in a specific range. Because this offset is required to complete the measurement, you can use existing VOS measurement techniques to measure CMRR.

Figure 3. This dual amplifier loop helps you measure the CMRR of an operational amplifier.

During this test, it is necessary to change the input common-mode voltage and measure the change of the operational amplifier VOS. The most obvious method is to apply a common-mode voltage to the non-inverting input of the device under test. This method requires the measurement system to reference the applied common mode voltage. Figure 3 shows the test setup for a dual-amplifier loop.

If you wish to complete all measurements of the relevant ground, connect the non-inverting input to ground and move the power supply in a positive or negative direction using tracking to apply an effective common-mode voltage to the amplifier. The output must be centered on the power supply to eliminate the AOL error that affects CMRR measurements. Equations 4 and 5 are the CMRR calculations.

Formula 4

Formula 5

DC open loop gain

AOL is the ratio of the output voltage to the differential input voltage. This measurement requires measuring the input offset voltage at multiple points and calculating the AOL.

When measuring AOL, you need to understand the output behavior of the op amp being measured. Ideally, the op amp may swing to two rails. This is not the case. AOL has a certain distance from the rail under a given load.

Assume that the output can swing from VOUT (positive) to VOUT (negative). If the output is brought to VOUT (positive), the voltage at the input of the device under test will be VOS + VIN (positive). An extra voltage VIN (positive) is required to drive the output to VOUT (positive). Conversely, if the output is brought to VOUT (negative), the voltage at the input of the device under test becomes VOS + VIN (negative). You need to measure this change at the input to achieve the desired full-scale output.

The method for measuring AOL using Figure 1 is:

1. Connect the appropriate load to the device under test
2. Use VIN to force VOUT (positive) according to the specifications of the positive swing specification.
3. Measure V(1), which is 1001*(VOS + VIN(Positive))

4. Then use V IN to force VOUT (negative) according to the specifications of the negative swing specification.
5. Measure V(2), ie 1001 * (VOS + VIN (negative))

6. Calculation:

7. Replace VIN (positive) and VIN (negative) with the measured value.

8. Please note that there is no VOS in the formula.

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