As the way to improve the performance of microprocessors by increasing the main frequency is limited by the "wall of power consumption," the architecture of multi-core parallel processing has gradually become one of the important means for the performance improvement of high-performance microprocessors. For a multi-core processor, its overall performance is not only related to the performance and number of its integrated processing cores, but also greatly constrained by the communication efficiency between processing cores. Existing multi-core processors use a network-on-a-chip constructed by metal wiring to implement data exchange between multi-processing cores. The on-chip network based on electrical interconnects needs to occupy multiple layers of metal wiring in the CMOS chip. With more and more processing cores integrated on the chip, multi-core processors have higher and higher requirements for on-chip network communication bandwidth, and traditional metal wiring is implemented. The on-chip network has gradually become a bottleneck in the development of multi-core processors due to its high power consumption, low bandwidth, and high latency.

The international roadmap for semiconductor technology clearly points out that there is a need to find a new technology that replaces the on-chip network of electrical interconnects as soon as possible. Optical interconnects are widely considered to be a promising alternative because of their low power consumption, high bandwidth, and low latency. In 2008, the United States and the European Union launched the "high-performance on-chip communication research based on nanophotonics" and the "wavelength-division multiplexed optical interconnection system on CMOS circuits." Internationally renowned computer companies such as Intel, IBM, HP, and Sun have also set up photonics research departments to initiate relevant research projects.

The optical router is the core device of the on-chip optical interconnection network. The basic function of the optical router is to implement data routing and switching between local nodes and neighboring nodes in the east, south, west and north directions. Major research institutes such as IBM, Intel, HP, SUN, MIT, Cornell University, Columbia University and European IMEC, Ghent University have conducted related research. The Photovoltaic Systems Laboratory of the Institute of Semiconductors, Chinese Academy of Sciences, has been engaged in the research of optical routers for on-chip optical interconnection nodes since 2009, and has innovatively proposed comprehensive performance (device loss, channel crosstalk, channel uniformity, and scalability) over international standards. The topology of peer optical routers. After two years of hard work, the research team took the lead in international implementation of a five-port optical router for on-chip optical interconnect network nodes in May 2011, with a data throughput of 50 Gbit/s (previously only Cornell University A joint group with Columbia University and a research group at the Institute of Semiconductors have implemented four-port optical routers.

The relevant research results were published in two consecutive issues in the optical journal Optics Express in September.