This article provides an analysis of a sample integrated proportional three-wire RTD measurement system to understand the source of the error, including the effects of excitation current mismatch. Integrated RTD measurement circuit Typical integrated RTD measurement solutions include field current, gain stage, analog-to-digital converter (ADC), and other useful features such as open-circuit sensor detection. These solutions not only greatly simplify the design, but also achieve high accuracy compared to discrete systems. The 24-bit delta-sigma ADC incorporates several features to facilitate the design of temperature measurement applications. An example of an ADC's modern integrated solution is the ADS1220. In this integrated solution, the current output digital-to-analog converter (DAC), also known as the integrated DAC (IDAC), is used to control the field current. To make wiring of the IDAC to the resistive temperature detector RTD circuit easier, the solution also includes a multiplexer. Finally, a programmable gain amplifier (PGA) is used to increase the voltage resolution of the RTD system. Figure 1 shows a simplified circuit schematic using an integrated ADC solution. Figure 1: Integrated proportional three-wire RTD measurement circuit Source of error in RTD measurement systems Regardless of whether the solution is integrated or discrete, the error sources in the three-wire proportional RTD measurement circuit are the same. Errors from the magnitude of the field current can be eliminated in the proportional measurement. However, errors caused by the initial mismatch and temperature drift of the two excitation currents can produce gain errors. Errors from the input gain stage, ADC and RREF tolerances can also cause errors in the final measurement. These errors can occur in the final measurement as offset, gain or linearity errors. Table 1 lists the ADC error sources that can affect RTD measurements. Table 1: Since the input to the ADC is voltage, the integral nonlinearity (INL) error, gain error, and IDAC mismatch error must be converted to the input dependent voltage. Tables 2 and 3 illustrate an example system. This system is used to calculate the error as an input related voltage. The value of the selection circuit is outside of these specified ranges, which are detailed in TI's reference design TIPD120. Table 2: Example Pt100 Specifications Table 3: Proportional circuit configuration of TIPD120 Using the example circuit configuration in Table 3, the error source can now be considered to be input dependent and the error source can be compared to the maximum RTD voltage (0.39048V). The PGA produces an input-dependent offset voltage error that can be directly used for the total error calculation. It is clearly stated that the gain error is expressed as a percentage of the full-scale range (also known as %FSR). The input-related voltage error can be calculated by multiplying the gain error of equation (2) by the maximum value of the RTD input voltage. It is clearly stated that the INL is expressed in parts per million (ppm) of the ADC full-scale range. INL is not a gain error. Therefore, it must be multiplied by the ADC's full-scale input voltage instead of the RTD voltage maximum. The full-scale input in this configuration can be calculated using equation (3), and the input-related INL error can be calculated using equation (4). It is clearly stated that the IDAC mismatch is expressed in %FSR. Therefore, the gain error and the resulting input-related voltage error can be calculated. This is shown in equations (5) and (6) below. Error from RREF tolerance The last important source of error is the tolerance of RREF, which produces a gain error in the ADC transfer function. The gain error caused by RREF can also be calculated by the same method used to calculate the IDAC mismatch gain error. Equation (7) shows the final result. Assuming the RREF tolerance is clearly specified as 0.05%, the gain error can be calculated as shown in equation (8). The input correlation error can be calculated using equation (9). Total error at room temperature (TA = 25 ° C) Table 4 lists a summary of all errors for this proportional three-wire RTD system at ambient temperature (TA) of 25 °C. The maximum likelihood error is calculated using the squared root value (RSS) of the input correlation error voltage. The IDAC mismatch accounts for approximately 95% of the total likelihood error. The total error can be calculated using equation (10). Table 4: Summary of all errors Equations (11) and (12) show how the total voltage error in Table 4 is converted to an error in ohms and finally converted to an error in degrees Celsius. With the sensitivity α of the Pt100 RTD, the error in ohms can be converted to the temperature error in degrees Celsius according to the IEC-60751 standard. Drift error (TA = -40°C to 85°C) Standard room temperature calibration techniques can be used to eliminate gain and offset errors from the system, leaving only linearity errors. However, temperature drift specifications still cause errors unless an over-temperature calibration is performed. Table 5 shows the temperature drift specifications for the ADC. The temperature drift of the IDAC current is the largest source of error over the operating temperature range. IDAC mismatch drift can be eliminated by technology. However, offset and gain error drift will still exist unless an overtemperature calibration is performed. Table 5: Summary of all temperature drift errors over the -40 ° C to 85 ° C temperature range The total drift error is mainly due to the IDAC mismatch drift; the total drift error will additionally produce a temperature error of ±0.306 °C over the operating temperature range of -40 ° C to 85 ° C. to sum up In this section, we analyzed the error of the example proportional three-wire RTD measurement system based on the ADC specifications and external components. While a proportional system can eliminate errors from the absolute value of the IDAC source, any mismatch and mismatch drift between the IDACs can produce errors. In many cases, IDAC mismatch is the largest source of error. In addition, IDAC mismatch drift is also the biggest contributor to overtemperature error. We will then discuss various options to reduce or eliminate errors caused by IDAC mismatch and mismatch drift, leaving only the gain error, offset voltage, and INL error from the ADC.
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