1 Hardware structure and circuit design 1.1 Overall design The entire system design uses ATMEL's 8-bit general-purpose microcontroller AT89C51 as the main processor, driving REALTEK's 10M Ethernet control chip RTL8019AS, to achieve serial data and external network interconnection. 1.2 NIC wiring design RTL8019AS is a 100-pin PQFP package with an operating voltage of 5V. The wiring schematic diagram is shown in Figure 1. Address SA0-4 is connected to the lower five bits of MCU P2; SA8 and SA9 are connected to the power supply; the remaining 13 pins of SA5-7 and SA10-19 are all grounded; IORB and IOWB are respectively connected to the read and write signal terminals of the MCU; RSTDRV is connected to To P1.2; 8-bit data SD0-7 is connected to the P0.020.7 pin of the microcontroller in sequence; TPOUT + and PTOUT- are the sending pin pairs, which are connected to the sending pins 1 and 2 of the RJ45 port; and TPIN + and TPIN- are Receive pin pair, connected to the receiving pins 3 and 6 of the RJ45 port; 20M crystal and ground capacitor are connected between the pins X1 and X2; LED0 and LED1 are connected in series with light-emitting diodes and 1k8 resistors, connected to the 5V power supply; IOCS16B tube Pin 27k8 is connected in series with a resistor to ground; pin BD0-3 (IOS0-3) is responsible for defining the base address location, all floating, as 0 input. LED0 means communication conflict COL by default, and LED1 means receive data packet. The sending pair and the receiving pair cannot be directly connected to the RJ45 plug, and should be connected to the RJ45 through the isolated voltage module (select 20F-01). The network card has a 16bit data line. You can use 16bit or 8bit mode to transfer data to make the IOCS16B pin low. The 8bit mode we selected is. 1.3 Serial interface section 1 The serial port part uses MAX232 and 9-pin serial port. The single chip microcomputer P3.0 / RXD0 and P3.0 / RXD0 are connected to the 2-pin and 3-pin of the serial port through the MAX232 chip respectively. The 5-pin serial port is grounded. The serial port selects the working mode 1, and the formula for calculating the baud rate at this time is: When the serial port is at 9600 baud rate, the crystal oscillator selects 11.0592M, the default value is calculated as 0xFD, smod = 0; the crystal oscillator selects 16MHz, the default value is 0xF7, smod = 1. 2 Initialization and working process of network card 2.1 Control method of network card chip RTL8019AS The control network card chip RTL8019AS is realized by reading and writing the 32-byte control register group on the chip. In addition, the chip contains 16kbyte of RAM, the address is 0x400020x7fff. These RAMs cannot be directly addressed by the single-chip microcomputer, and they must be read and written by DMA through the 32-byte control register set. The 32-byte control register set can be directly addressed by the microcontroller, but its base address is configured through pins BD0-3 (IOS0-3). In the circuit, all four pins are left floating, all 0 input, the product data shows that the base address is 300H. The 32-byte control register is divided into 4 pages. The 00H register is called Command Register (CR). The highest two bits of CR represent the current page of the register. 01H to 0FH have different meanings on different pages. At the same time, even if the same page, the meaning of reading and writing may be different. This is very worth noting. 10H217H is the remote DMA port, and 18H-1FH is the network card reset port. 2.2 DMA data channel RTL8019AS is divided into two parts: Remote DMA (RemoteDMA) channel and Local DMA (LocalDMA) channel. The local DMA completes the data exchange between the controller and the network cable, and the remote DMA completes the data exchange between the main processor and the network card. SCM main processor only needs to operate remote DMA to send and receive data. When receiving data, the data received by RTL8019AS is stored in the receive buffer by FIFO after MAC comparison and CRC check. After one frame is received, the host processor is notified by interrupt or register flag. The channel reads it. When the main processor wants to send data to Ethernet, first send a frame of data to the send buffer area in RTL8019AS through the remote DMA channel, and then issue a transfer command; RTL8019AS completes the frame after sending the previous frame. send. The so-called DMA is Direct Memory Access (DirectMem2oryAccess). The normal addressing method is to give an address and then take out the corresponding value. In the DMA mode, we specify a register address, as long as the host repeatedly reads or writes this address, a large amount of data can be taken out or written. The remote DMA port designated by the network card is used for this purpose. After setting the start address and the number of bytes read, we repeatedly read the remote DMA port, and we can read the data packets received from the network cable in the network card from the RAM area of ​​0x400020x7fff. After writing the number of bytes, we repeatedly write to the remote DMA port to send the data to the send buffer RAM of the network card, and then send the send command to send the data packet to the network cable. 2.3 Initialization process of network card Reset, make RSTDRV first high and then low, pay attention to each step must have a delay of 100ms to ensure a successful reset. Then perform a warm reset, which is to read and write the reset port of the network card in sequence. Make CR = 0x21 to stop the chip and select page 0. Make RBCR1 = 0; RBCR0 = 0, clear the number of bytes transferred by remote DMA operation. Make PSTART = 0x46; PSTOP = 0x80; BNRY = 0x46, set the receiving start page, end page and border page. Make IMR = 0x0, clear the interrupt mask register. Make RCR = 0x08 + 0x04, set the receive configuration register, allow to receive multiple access and broadcast messages. Make TCR = 0, set the transmission configuration register, use the default configuration. Make DCR = 0x80 + 0x40 + 0x00, set the data configuration register, select byte DMA. Make ISR = -1, set the interrupt status register, and clear all existing interrupts. Use DMA to get the MAC address of the network card from 0000H2000BH. Note that each byte of the MAC address is stored repeatedly, so as long as the singular 1, 3, 5 and other bytes are enough. With CR = 0x61, select page 1. Put the MAC address just obtained into PAR0-5. The network card checks whether the received packet matches the MAC value in the PAR, and then decides to accept or discard it. Therefore, you can set this PAR value arbitrarily to forge your own MAC value. Set MAR02MAR7 all to 0xFF, allowing to receive all multiple access data packets. Make CURR = 0x47, set the current receiving page to 0x47. Make CR = 0x22, start the network card chip, and start the receiving and sending process. 2.4 Process of receiving and sending network card The network card RAM is a structure of 256byte as a page, which is stored by page. The 16bit RAM address is 8bit high and is also called the page number. The 16k RAM address of the network card ranges from 0x400020x7fff, from page 0x40 to page 0x7f, for a total of 64 pages. 64 pages are used to receive and send data packets. Reception and transmission are carried out in units of the smallest page. The receive buffer needs to be defined, and the rest can be used as the send buffer. The receive buffer is determined by two registers: PSTART (PageStartRegister) and PSTOP (PageStopRegister). After setting the receive buffer, this buffer forms a circular queue. There are two registers CURR and BNRY that control the receive buffer. CURR is the pointer of the network card write buffer, which points to the current page to be written; BNRY is the read pointer, which points to the page that the user has read. BNRY cannot exceed CURR, otherwise the data not read by the user will be overwritten. After setting the CURR, the user does not need to control it. After receiving the new data, the NIC will modify it automatically. After the user reads the data, it is necessary to modify the value of BNRY to notify the network card that the data has been read. After the NIC chip receives the Ethernet data packet, it exists in the page pointed to by CURR. A data packet can occupy one page or multiple pages. In the header of the received packet, the information of the packet is stored. The format of the header is shown in Table 1: After reading this packet header, we can know the receiving status of this packet, the packet length, and the location of the next packet. In the receiving cycle, check the ISR status of the interrupt status register and find that there is a new packet, first read the packet header information, then read the entire packet according to the packet header instructions, then rewrite BNRY, and then read the next packet, and so on, until the CURR is reached position. Note that a packet may occupy the first and last pages of the receive buffer, so you must read it carefully. Sending a data packet is relatively simple. Transfer the prepared data to the transmit buffer using DMA, and then set the transmission length to TBCR1 and TBCR0, and then set the transmission start page, that is, let TPSR = 0x40, and finally, CR = 0x26, start to transmit Too. After the transfer is completed, clear the send completion flag of the interrupt status register ISR. It is worth noting that the packet length of the sending packet cannot be less than the 60byte specified by Ethernet, otherwise the network card will not send it. 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The RAM area of ​​the network card is shown in Figure 2. We set PSTART and PSTOP to determine the receiving area between 46 and 7F. The remaining 6 pages are used as the sending buffer, which can meet the maximum Ethernet data packet with a capacity of 1514 bytes at a time. Claim. The initial value of CURR is set to 47, and the initial value of BNRY is set to 46. When a new data packet is received (for example, 3 pages), the network card places them on pages 47, 48, and 49, and CURR automatically points to page 4A. When we finish reading these three pages of data packets, we need to change BNRY to 49 to notify the network card that the data packets have been read. 
The liquid level sensor is a modular circuit, which has the advantages of acid resistance, moisture resistance, shock resistance and corrosion resistance. The circuit contains a constant current feedback circuit and an internal protection circuit, which can make the maximum output current no more than 28ma, so it can reliably protect the power supply and prevent the secondary instrument from being damaged.