Any chip that has to work must meet a temperature range, which is the temperature on the silicon wafer, commonly referred to as the junction temperature. ALTERA's FPGAs are divided into commercial (commercial) and industrial (induatrial). Commercial-grade chips can operate at junction temperatures ranging from 0 to 85 degrees Celsius, while industrial-grade chips range from -40 to 100 degrees Celsius. In the actual circuit, we must ensure that the junction temperature of the chip is within its acceptable range. As the power consumption of the chip increases, more and more heat is generated at work. If you want to maintain the junction temperature of the chip within the normal range, you need to take some measures to make the heat generated by the chip quickly dissipate into the environment. Anyone who has studied middle school physics knows that heat transfer mainly uses three methods, namely conduction, convection and radiation. The heat dissipation of the chip is also carried out in several ways. The figure below shows a simplified model of a chip's heat dissipation. The heat generated by the chip in the figure is mainly transmitted to the off-chip package. If the heat sink is not attached, the chip package is directly spread into the environment. If a heat sink is added, the heat is transferred from the outer package of the chip through the heat sink. On the heat sink, the heat sink is transferred to the environment. In general, the surface area of ​​the heat sink is made quite large, and the contact surface with air is large, which is advantageous for heat transfer. In the usual practice, it has been found that most of the heat sinks are black, because the black objects easily radiate heat outward, which also helps the heat to be radiated outward. Moreover, the faster the wind speed on the surface of the heat sink, the better the heat dissipation. Simplified chip heat flow model In addition, a small amount of heat is conducted through the chip substrate to the solder balls of the chip, and then the heat is walked through the PCB to the environment. Since this portion of the heat is relatively small, this part is ignored when discussing the thermal resistance of the chip package and the heat sink. First of all, you need to understand the concept of "thermal resistance". Thermal resistance is the ability to describe the heat conduction of an object. The smaller the thermal resistance, the better the thermal conductivity. The worse, the worse, this is similar to the concept of resistance. From the silicon wafer of the chip to the thermal resistance of the environment, it is assumed that all the heat is finally dispersed into the environment by the heat sink, so that a simple thermal resistance model can be obtained, as shown below: Chip heat dissipation model with heat sink The total thermal resistance from the silicon wafer to the environment is called JA, so it satisfies: JA=JC+CS+SA JC refers to the thermal resistance of the chip to the outer package, which is generally provided by the chip supplier; CS refers to the thermal resistance of the off-chip package to the heat sink. If the heat sink is attached to the surface of the chip with thermal conductive glue, this thermal resistance is the guide of the thermal adhesive. Thermal resistance, generally provided by the thermal adhesive supplier; SA refers to the thermal resistance of the heat sink to the environment, generally given by the heat sink manufacturer, this thermal resistance value is reduced as the wind speed increases, the manufacturer usually The thermal resistance values ​​at different wind speeds are given. The package of the chip itself acts as a heat sink. If the chip does not have a heat sink, JA is the thermal resistance value of the silicon chip after external packaging and then to the environment. This value is obviously greater than the JA value of the heat sink. This value depends on the characteristics of the chip's own package and is generally provided by the chip manufacturer. The figure below shows the package thermal resistance for ALTERA's STRATIX IV devices. It gives the JA values ​​of the chips at various wind speeds. These values ​​can be used to calculate the situation without a heat sink. In addition, JC is used to calculate the total JA value when the heat sink is used. Thermal Resistance in Stratix iv Device Packages Assuming that the power consumed by the silicon is P, then: TJ (junction temperature) = TA + P * JA Need to meet the TJ can not exceed the maximum junction temperature allowed by the chip, and then according to the ambient temperature and the actual power consumed by the chip, the maximum allowable requirement for JA can be calculated. JAMax=(TJMax - TA)/P TA (ambient temperature) If the JA of the chip package itself is larger than this value, then it is necessary to consider adding a suitable heat sink to the chip to reduce the effective JA value of the chip to the environment and prevent the chip from overheating. In the actual system, part of the heat will also be dissipated from the PCB. If the number of PCB layers is large and the area is large, it is also very beneficial for heat dissipation. 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